1. Field of the Invention
The present invention relates to a computer, and to be further detailed, relates to a computer having a reduced instruction set, known as RISC (Reduced Instruction Set Computer).
2. Description of Related Art
The RISC is a computer which is intended to perform processing at higher speed by forming only frequently-used instructions in an instruction set of the conventional computer into hardware structures. According to D. A. Patterson and C. H. Sequin, "A VLSI RISC", Computer, vol. 15, No.9, September 1982, pp8.about.22, the following features are enumerated.
(1) One-cycle instruction
(2) Fixed-length instruction format
(3) Load/store architecture
(4) Wired logic
(5) Overlap register window
(6) Optimization of pipeline by means of compiler
The present invention relates to the overlap register window among the above-described various features of the RISC. Hereinafter, description is made on the overlap register window in the conventional RISC in reference to the drawings.
FIG. 1(a) is a schematic diagram showing a physical register file of the RISC.
In FIG. 1(a), addresses 0.about.7 are for a global register, and addresses 8.about.111 are for a local register. In addition, the global register means is a register for global variables, and the local register means is a register for local variables.
FIG. 1(b) shows a logical register file. In executing a procedure, a computer uses only part of a register called a register window in the physical register file.
For example, a procedure (PROC) A is assumed to be executed, and then this procedure A is assumed to use the addresses 0.about.7 of the register file as the global register, and addresses 24.about.47 of the same register file as the local register, respectively.
And when the procedure A calls another procedure (PROC) B further in this state, this procedure B is called by entering arguments into addresses 40.about.47 of the register file. Then, the called procedure B uses the addresses 0.about.7 of the register file as the global register, and the addresses 40.about.63 of the same register file as the local register, respectively.
In the conventional normal computer, when a procedure call takes place, the called environment is made to save into a stack set in a memory. However, in the RISC, there is performed no saving into the stack but such processing as moving the register window. In addition, this register window is being overlapped, and the overlapped portion is used for an argument register for transfer between procedures.
In the above-described example, the addresses 40.about.47 of the register file are used for both procedures A and B, and a call side prepares the argument in the addresses thereof. Like processing is performed in returning from a procedure, and the register window is moved toward lower-numbered addresses. Then, the argument at a return is prepared in the overlapped portion of the lower-numbered addresses of the register window. For such an overlapped register window as described above, saving processing of arguments into the memory can be dispensed with. Generally, the operating speed of the memory is lower in comparison with that of a CPU, and therefore in the conventional computer, the saving processing of arguments is likely to cause an overhead, however the RISC is not liable to have such an overhead.
In the example as shown in FIGS. 1(a) and (b), there are six register windows, and therefore such processing as making the environment at a call save into the memory, as is the case with the conventional computer, can be dispensed with up to five procedure calls. However, when a sixth procedure call or a call thereafter takes place, there being no room in the register file, some saving processing is required to be performed. Also in the RISC, when the residual capacity of the register file becomes zero (hereinafter referred to as overflow of register file), processing of making the oldest register window save into the memory, that is, trap routine is started. Accordingly, in the RISC, when an overflow of the register takes place, only the performance equivalent to that of the conventional general computer can be obtained.
Generally, since the RISC is fabricated as a VLSI, reduction in chip size contributes to reduction in manufacturing cost, however, it is necessary to dispose as many registers as possible on the chip to avoid an overflow of the register file. In other words, the request for reducing the cost and the request for improving the performance are in an incompatible relation with each other.